Paper

DEEP: An Iterative Fpga-based Many-core Emulation System for Chip Verification and Architecture Research

2011

Created by Alysson Bolognesi Prado at 2017-03-16 11:15:28.0.

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Bibliographic Sets

2

ACM - affordances

Research Paradigm

Authors

4

Juergen Ributzka

References

4

EDA in IBM: past, present, and future

DEEP: An Iterative FPGA-based Many-Core Emulation System for Chip Verification and Architecture Research, December 2010

An Iterative Emulation Platform for Multiprocessor-System-on-Chip Designs

RAMP: Research Accelerator for Multiple Processors