Energy Savings via Dead Sub-Block Prediction
Energy Efficient Last Level Caches via Last Read/Write Prediction
Optimizing Memory Locality Using a Locality-Aware Page Table
Dynamic thread mapping of shared memory applications by exploiting cache coherence protocols
LAPT: A locality-aware page table for thread and data mapping
A dynamic block-level execution profiler
Parallel Computing
2012 IEEE 24th International Symposium on Computer Architecture and High Performance Computing
Journal of Parallel and Distributed Computing
2013 25th International Symposium on Computer Architecture and High Performance Computing
2014 IEEE 26th International Symposium on Computer Architecture and High Performance Computing
Philippe Olivier Alexandre Navaux
Philippe Navaux
MATTHIAS Diener
Eduardo HM Cruz
Carlos Villavieja
Laercio L. Pilla