A hardware evaluation of cache partitioning to improve utilization and energy-efficiency while preserving responsiveness
A view of the parallel computing landscape
RAMP: Research Accelerator for Multiple Processors
IEEE Micro
Communications of the ACM
Proceedings of the 40th Annual International Symposium on Computer Architecture - ISCA ’13
John Wawrzynek
John Kubiatowicz
Derek Chiou
David Patterson
James C. Hoe
Christoforos Kozyrakis
DEEP: An Iterative Fpga-based Many-core Emulation System for Chip Verification and Architecture Research
Towards Energy Proportionality for Large-scale Latency-critical Workloads
Accelerating Pathology Image Data Cross-comparison on CPU-GPU Hybrid Systems