Timed pattern generation for noise-on-delay calculation
Integer linear programming-based synthesis of skewed logic circuits
Selectively clocked skewed logic (SCSL)
Dynamic noise analysis in precharge-evaluate circuits
Proceedings of the 39th conference on Design automation - DAC ’02
Proceedings of the 2003 conference on Asia South Pacific design automation - ASPDAC
Proceedings of the 37th conference on Design automation - DAC ’00
Proceedings of the 2001 international symposium on Low power electronics and design - ISLPED ’01
Naran Sirisantana
Aiqun Cao
Seung Hoon Choi
Cheng Kok Koh
Shawn Davidson
Florentin Dartu