Using Memory Access Traces to Map Threads and Data on Hierarchical Multi-core Platforms
Using Power Demand and Residual Load Imbalance in the Load Balancing to Save Energy of Parallel Systems
Memory-aware Thread and Data Mapping for Hierarchical Multi-core Platforms
Philippe Olivier Alexandre Navaux
Alexandre da Silva Carissimi
Eduardo Henrique Molina da Cruz
Christiane Pousa Ribeiro
Marco Antonio Zanata Alves
V. MARTINEZ