ACM - affordances
Stefan Tillich
Mario Kirschbaum
Alexander Szekely
Prototype IC with WDDL and Differential Routing – DPA Resistance Assessment
Power Analysis Resistant AES Implementation with Instruction Set Extensions
Instruction Set Extensions for Efficient AES Implementation on 32-bit Processors
Aegis: A Single-Chip Secure Processor
A Design Flow and Evaluation Framework for DPA-Resistant Instruction Set Extensions
System design methodologies for a wireless security processing platform